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本程序是用VHDL语言编写的,其中包括并口通讯,DDS电机调速,编码器信号处理等,对研究这方面的工程人员有一定参考作用-This procedure is used VHDL language, including the parallel port communication, DDS motor, encoder signal processing and so on, to look at this area of engineering staff have a certain refe
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uart的代码,经实际运行可以通信,是xilinx uart 代码的改进,网上的xilinx uart代码有很多bug,用此代码可以改进运行。-UART code, the actual operation can be communication, xilinx uart code are improved, xilinx uart code online has a lot of bug, the code can be improved with this operation.
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RS232串行通信,采用VHDL编程,由波特率发生器,接收器和发送器构成-RS232 serial communication using VHDL programming, by the baud rate generator, receiver and transmitter constitute
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实现FPGA和上位机的串口通信,里面由波特率发生器,移位寄存器,计数器,detecter,switch,switch_bus等功能块综合而成。-FPGA implementation and the host computer' s serial communication, which by the baud rate generator, shift register, counters, detecter, switch, switch_bus such as function bl
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FPGA的串口模块,实现FPGA与PC机的串口通讯。-FPGA serial modules, FPGA implementation with the PC-Serial communication.
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通信电路中产生载波的电路,可应用于GPS中的捕获和跟踪环路。-Generated carrier communication circuit of the circuit, can be applied to GPS in the capture and tracking loop.
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通信系统中的噪声发生器,可用于CDMA信号源电路。-Communication system noise generator can be used for CDMA signal source circuit.
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test bench for spi communication
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毕业论文(单片机类)毕业设计(论文)OFDM通信系统基带数据-Thesis (Singlechip category) Graduation Project (Thesis) OFDM base-band data communication system
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qpsk vhdl code ue to impelemented on fpga kits
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无线光通信技术具有通信容量大、传输速率高等众多优点, 在许多场合都有重要的应用, 是现代通信技术研究的一个热点。由于脉冲位置调制 ( PPM ) 有较高的平均功率利用率和抗干扰能力, 故 PPM是无线光通信系统中常用的调制方式。在研究 PPM调制技术的基础上, 就基于 FPG A的无线光通信 PPM调制系统进行设计, 并用 V H D L语言完成了系统的设计和仿真。仿真结果表明, 该设计具有正确性和合理性。-Wireless optical communication technology ha
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FPGA芯片与ADI公司的AD9779之间的通信,总共有四个通道,68对LVDS,采样时钟是122.88MHz-FPGA chips ADI' s AD9779 and communication between, a total of four channels, 68 pairs of LVDS, the sampling clock is 122.88MHz
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VHDL语言写的UART通信接收端程序,适用于RS232协议-VHDL language the receiving end of the UART communication procedures, applicable to RS232 protocol
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UART通信协议的硬件描述语言代码,用与FPGA的总线接口开发-UART communication protocol of the hardware descr iption language code, using the bus interface with the FPGA development
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USB通信协议的硬件描述语言代码,用于FPGA的总线接口控制器开发-USB communication protocol of the hardware descr iption language code for the FPGA bus interface controller development
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CAN通信协议的硬件描述语言代码,用于FPGA的总线接口控制器开发-CAN communication protocol of the hardware descr iption language code for the FPGA bus interface controller development
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hamming/汉明码的解码代码,在通信中常常用到汉明码-hamming/hamming code decoder code, usually used in communication Hamming Code
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To control EEPROM (for example AT24C16),This document introduce TWI communication with ATmega128.
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异步FIFO是用来适配不同时钟域之间的相位差和频率飘移的重要模块。本文设计的异步FIFO采用了格雷(GRAY)变换技术和双端口RAM实现了不同时钟域之间的数据无损传输。该结构利用了GRAY变换的特点,使得整个系统可靠性高和抗干扰能力强,系统可以工作在读写时钟频率漂移达到正负300PPM的恶劣环境。并且由于采用了模块化结构,使得系统具有良好的可扩充性。-Asynchronous FIFO is an important module which always used to absorb the
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内容1:哈尔滨工程大学信息与通信工程学院的课件-适合初学VHDL语言的人。内容2:VHDL语言详解的讲义。-1: Harbin Engineering University College of Information and Communication Engineering of software- suitable for novice VHDL language. Content 2: VHDL language of the notes explain.
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